Tohutoro APA (7th ed.)

(2008). System-on-chip test architectures: Nanometer design for testability / edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.

Tohutoru Kātū Chicago (17th ed.)

System-on-chip Test Architectures: Nanometer Design for Testability / Edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. 2008.

Tohutoro MLA (9th ed.)

System-on-chip Test Architectures: Nanometer Design for Testability / Edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. 2008.